Jia-Hua Hong, Ming-Chun Liang, Ming-Yang Haung, T. Tsai, Q. Fang, Shuenn-Yuh Lee
{"title":"具有低噪声放大器和高通σ - δ调制器的模拟前端电路,用于脑电图或ECoG采集系统","authors":"Jia-Hua Hong, Ming-Chun Liang, Ming-Yang Haung, T. Tsai, Q. Fang, Shuenn-Yuh Lee","doi":"10.1109/ISBB.2011.6107634","DOIUrl":null,"url":null,"abstract":"The present paper proposes an analog front-end (AFE) circuit, including only one low-noise amplifier with chopping techniques and one high-pass sigma-delta modulator (HPSDM), which can be applied as a sensing circuit for electroencephalogram or electrocorticogram (ECoG) signal acquisition systems. The low-noise amplifier, which has a close-loop gain of 20 V/V and CMRR of 109.6 dB, is implemented by a differential difference amplifier with feedback pseudo-resistors and capacitors. The HPSDM is implemented in a feed-forward architecture with an order of 3, an oversampling ratio of 128, and a 1-bit quantizer under a sampling frequency of 51.2 kHz. The TSMC 0.18 μm 1P6M CMOS process is used in the entire AFE circuit with a supply voltage of 1.2 V and power consumption of 28.7 μW. Within the maximum range of ECoG signals, the simulated SNR and SFDR of the entire AFE circuits are 70.8 and 73 dB, respectively.","PeriodicalId":345164,"journal":{"name":"International Symposium on Bioelectronics and Bioinformations 2011","volume":"103 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"11","resultStr":"{\"title\":\"Analog front-end circuit with low-noise amplifier and high-pass sigma-delta modulator for an EEG or ECoG acquisition system\",\"authors\":\"Jia-Hua Hong, Ming-Chun Liang, Ming-Yang Haung, T. Tsai, Q. Fang, Shuenn-Yuh Lee\",\"doi\":\"10.1109/ISBB.2011.6107634\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The present paper proposes an analog front-end (AFE) circuit, including only one low-noise amplifier with chopping techniques and one high-pass sigma-delta modulator (HPSDM), which can be applied as a sensing circuit for electroencephalogram or electrocorticogram (ECoG) signal acquisition systems. The low-noise amplifier, which has a close-loop gain of 20 V/V and CMRR of 109.6 dB, is implemented by a differential difference amplifier with feedback pseudo-resistors and capacitors. The HPSDM is implemented in a feed-forward architecture with an order of 3, an oversampling ratio of 128, and a 1-bit quantizer under a sampling frequency of 51.2 kHz. The TSMC 0.18 μm 1P6M CMOS process is used in the entire AFE circuit with a supply voltage of 1.2 V and power consumption of 28.7 μW. Within the maximum range of ECoG signals, the simulated SNR and SFDR of the entire AFE circuits are 70.8 and 73 dB, respectively.\",\"PeriodicalId\":345164,\"journal\":{\"name\":\"International Symposium on Bioelectronics and Bioinformations 2011\",\"volume\":\"103 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-12-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"11\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Symposium on Bioelectronics and Bioinformations 2011\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISBB.2011.6107634\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Symposium on Bioelectronics and Bioinformations 2011","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISBB.2011.6107634","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Analog front-end circuit with low-noise amplifier and high-pass sigma-delta modulator for an EEG or ECoG acquisition system
The present paper proposes an analog front-end (AFE) circuit, including only one low-noise amplifier with chopping techniques and one high-pass sigma-delta modulator (HPSDM), which can be applied as a sensing circuit for electroencephalogram or electrocorticogram (ECoG) signal acquisition systems. The low-noise amplifier, which has a close-loop gain of 20 V/V and CMRR of 109.6 dB, is implemented by a differential difference amplifier with feedback pseudo-resistors and capacitors. The HPSDM is implemented in a feed-forward architecture with an order of 3, an oversampling ratio of 128, and a 1-bit quantizer under a sampling frequency of 51.2 kHz. The TSMC 0.18 μm 1P6M CMOS process is used in the entire AFE circuit with a supply voltage of 1.2 V and power consumption of 28.7 μW. Within the maximum range of ECoG signals, the simulated SNR and SFDR of the entire AFE circuits are 70.8 and 73 dB, respectively.