用于倒装芯片和BGA焊料碰撞的粘点/sup TM/技术

A. Beikmohamadi, A. Cairncross, J. E. Gantzhorn, B. Quinn, M. Saltzberg, G. Hotchkiss, G. Amador, L. Jacobs, R. Stierman, S. Dunford, P. Hundt
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引用次数: 2

摘要

随着电子市场向高性能集成电路(IC)发展,每个IC需要更多数量的输入和输出(I/ o)。这导致了市场对低成本、高分辨率方法的强烈需求,用于在ic和区域阵列半导体封装(如球栅阵列(BGAs)和芯片规模封装(csp)的键合盘上放置控制体积的焊料(或其他金属合金)。为了满足这一需求,杜邦开发了粘性点/sup TM/的概念,它利用光成像粘合剂的专有技术形成粘性区域的图案,随后填充导电颗粒,然后转移到集成电路或封装中。杜邦的专业知识和努力一直集中在开发前端人口过程的系统方法,同时与德州仪器公司密切合作,后者开发了能够有效转移导电颗粒的技术。本文详细介绍了成像和人口技术,并讨论了这种新的晶圆碰撞工艺的总体进展。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Tacky Dots/sup TM/ technology for flip chip and BGA solder bumping
As the electronics market moves toward higher performance Integrated Circuits (ICs), each IC requires larger numbers of Inputs and Outputs (I/Os). This has resulted in a strong need in the marketplace for a low cost, high resolution method for placing controlled volumes of solder (or other metal alloys) on bond pads of ICs and area array semiconductor packages, such as Ball Grid Arrays (BGAs), and Chip Scale Packages (CSPs). To satisfy this need, DuPont has developed the concept of Tacky Dots/sup TM/, which utilizes proprietary technology in photoimageable adhesives to form a pattern of tacky areas, which are subsequently populated with conductive particles and then transferred to ICs or packages. DuPont's expertise and effort have been focused on developing a systems approach to the front end population process, while working closely with Texas Instruments who has developed technology to enable the effective transfer of the conductive particles. This paper contains details of the imaging and population technology as well as a discussion of the overall progress of this new wafer bumping process.
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