高度线性直接转换接收器使用定制的片上平衡

Xiaodong Liu, Vijay Viswam, S. Andersson, J. Wernehag, I. Din, P. Andreani
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引用次数: 1

摘要

本文提出了一种采用65纳米CMOS技术的高线性射频接收器前端,具有片上平衡,用于2GHz的蜂窝应用。基于直接转换架构,实现的前端包括用于单端到差分信号转换的定制片上平衡器、差分共门低噪声放大器和电压模式正交无源混频器。模拟带内压缩点为−0.5dBm,三阶输入截距点为+6.2dBm。通过频率转换滤波技术,实现了+4.8dBm的带外阻塞压缩点和+16dBm的三阶输入截距点。低噪声放大器使用1.8V电源消耗3mA电流。包括平衡损耗、低噪声放大器、混频器和基带滤波器简化模型在内的总体噪声系数为3.8dB。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Highly linear direct conversion receiver using customized on-chip balun
This paper presents a highly linear radio frequency receiver front-end with on-chip balun for cellular application at 2GHz in 65nm CMOS technology. Based on direct conversion architecture, the implemented front-end comprises a customized on-chip balun for single-ended to differential signal conversion, a differential common-gate low noise amplifier and voltage mode quadrature passive mixer. The simulated in-band compression point is −0.5dBm and third order input intercept point is +6.2dBm. An out-of-band blocker compression point up to +4.8dBm and third order input intercept point of +16dBm are achieved thanks to the frequency translation filtering technique. The low-noise amplifier consumes 3mA current using 1.8V supply. The overall noise figure including balun loss, low-noise amplifier, mixer and a simplified model of a baseband filter is 3.8dB.
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