T. Mano, K. Takeya, T. Watanabe, K. Kiuchi, T. Ogawa, K. Hirata
{"title":"采用钼-多晶硅技术制造的256K RAM","authors":"T. Mano, K. Takeya, T. Watanabe, K. Kiuchi, T. Ogawa, K. Hirata","doi":"10.1109/ISSCC.1980.1156098","DOIUrl":null,"url":null,"abstract":"128K block has two arrays of 64Kb fundamental cells and about 2Kb spare cells, and dummy sense circuit’. The spare cells are connected with four pairs of spare bit-lines and two spare word-lines. Since each pair of spare bit-lines require one additional sense amplifier, one block bas 516 amplifiers. The amplifier includes coupling capacitors, which make it possible to obtain a high refresh voltage. Amplifier circuits and operating waveforms are shown in Figure 2. The amplifier begins to detect the signal by clock @ ~ 1 , and amplification is accelerated by clock @ ~ 2 . After sensing operation the capacitors are connected with the bit-lines by clock @B. Therefore the potential of the bit-line becomes high enough for refreshing. Clock @ ~ 1 also drives the coupling capacitors. During sensing period, however, the capacitors are separated from the bitlines to prevent an increase in bit-line capacitance. As a result, this amplifier can detect a signal of ? 50mV. In the memory cell array the word line crosses over the storage capacitor electrodes, and is composed of molybdenum, which is the gate material of the cell transistor2. The bit-line is made of interconnection metal of aluminum and the storage capacitor electrode consists of polysilicon. The memory cell has been designed to obtain the signal of * 120mV in the worst case. Since both the word-line and bit-line materials are metallic, the propagation delay in the array becomes small. In other circuits Si-gate transistors are used. To improve the yield of RAMS the fault-tolerant concept is introduced. Spare cells can substitute for defective cells. This substitution is achieved by utilizing electrically programmable polysilieon resistors, which include PN junctions. Figure 3 shows the spare column decoder using these resistors. The resistance is at least 109Q initially, and it becomes less than 3 x l O 3 Q after transition. Since the resistor has low transition voltage and current (11V and 7mA), programming is controlled easily by MOS circuits. The substitution requires only 15V programming pulses and can be done during wafer probing. The resistor characteristic is shown in Figure 4. To program the A block diagram of the circuit is shown in Figure 1. Each","PeriodicalId":229101,"journal":{"name":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"183 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"28","resultStr":"{\"title\":\"A 256K RAM fabricated with molybdenum-polysilicon technology\",\"authors\":\"T. Mano, K. Takeya, T. Watanabe, K. Kiuchi, T. Ogawa, K. Hirata\",\"doi\":\"10.1109/ISSCC.1980.1156098\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"128K block has two arrays of 64Kb fundamental cells and about 2Kb spare cells, and dummy sense circuit’. The spare cells are connected with four pairs of spare bit-lines and two spare word-lines. Since each pair of spare bit-lines require one additional sense amplifier, one block bas 516 amplifiers. The amplifier includes coupling capacitors, which make it possible to obtain a high refresh voltage. Amplifier circuits and operating waveforms are shown in Figure 2. The amplifier begins to detect the signal by clock @ ~ 1 , and amplification is accelerated by clock @ ~ 2 . After sensing operation the capacitors are connected with the bit-lines by clock @B. Therefore the potential of the bit-line becomes high enough for refreshing. Clock @ ~ 1 also drives the coupling capacitors. During sensing period, however, the capacitors are separated from the bitlines to prevent an increase in bit-line capacitance. As a result, this amplifier can detect a signal of ? 50mV. In the memory cell array the word line crosses over the storage capacitor electrodes, and is composed of molybdenum, which is the gate material of the cell transistor2. The bit-line is made of interconnection metal of aluminum and the storage capacitor electrode consists of polysilicon. The memory cell has been designed to obtain the signal of * 120mV in the worst case. Since both the word-line and bit-line materials are metallic, the propagation delay in the array becomes small. In other circuits Si-gate transistors are used. To improve the yield of RAMS the fault-tolerant concept is introduced. Spare cells can substitute for defective cells. This substitution is achieved by utilizing electrically programmable polysilieon resistors, which include PN junctions. Figure 3 shows the spare column decoder using these resistors. The resistance is at least 109Q initially, and it becomes less than 3 x l O 3 Q after transition. Since the resistor has low transition voltage and current (11V and 7mA), programming is controlled easily by MOS circuits. The substitution requires only 15V programming pulses and can be done during wafer probing. The resistor characteristic is shown in Figure 4. To program the A block diagram of the circuit is shown in Figure 1. Each\",\"PeriodicalId\":229101,\"journal\":{\"name\":\"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"volume\":\"183 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"28\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.1980.1156098\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1980.1156098","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 256K RAM fabricated with molybdenum-polysilicon technology
128K block has two arrays of 64Kb fundamental cells and about 2Kb spare cells, and dummy sense circuit’. The spare cells are connected with four pairs of spare bit-lines and two spare word-lines. Since each pair of spare bit-lines require one additional sense amplifier, one block bas 516 amplifiers. The amplifier includes coupling capacitors, which make it possible to obtain a high refresh voltage. Amplifier circuits and operating waveforms are shown in Figure 2. The amplifier begins to detect the signal by clock @ ~ 1 , and amplification is accelerated by clock @ ~ 2 . After sensing operation the capacitors are connected with the bit-lines by clock @B. Therefore the potential of the bit-line becomes high enough for refreshing. Clock @ ~ 1 also drives the coupling capacitors. During sensing period, however, the capacitors are separated from the bitlines to prevent an increase in bit-line capacitance. As a result, this amplifier can detect a signal of ? 50mV. In the memory cell array the word line crosses over the storage capacitor electrodes, and is composed of molybdenum, which is the gate material of the cell transistor2. The bit-line is made of interconnection metal of aluminum and the storage capacitor electrode consists of polysilicon. The memory cell has been designed to obtain the signal of * 120mV in the worst case. Since both the word-line and bit-line materials are metallic, the propagation delay in the array becomes small. In other circuits Si-gate transistors are used. To improve the yield of RAMS the fault-tolerant concept is introduced. Spare cells can substitute for defective cells. This substitution is achieved by utilizing electrically programmable polysilieon resistors, which include PN junctions. Figure 3 shows the spare column decoder using these resistors. The resistance is at least 109Q initially, and it becomes less than 3 x l O 3 Q after transition. Since the resistor has low transition voltage and current (11V and 7mA), programming is controlled easily by MOS circuits. The substitution requires only 15V programming pulses and can be done during wafer probing. The resistor characteristic is shown in Figure 4. To program the A block diagram of the circuit is shown in Figure 1. Each