不变采样保持放大器对保持电容放电

A. Penin, A. Sidorenko
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引用次数: 0

摘要

传统的测量信号取样保持放大器包括取样开关形式的取样保持电路、电压保持电容器和电压中继器,还包括两个类似的参考电压取样保持电路。所提出的放大器的思想是保持电容在所有三个采样和保持电路中都是相等放电的。因此,存储的三个电压样品的仿射比在长放电时间内不会改变固有值。然后,将该不变仿射比作为测量信号。还包括一个复制(恢复)单元,计算这个仿射比。反过来,所包含的信息信号前整形器使用参考电压预转换(准备)初始测量信号。因此,保持时间显着增加,同时保持给定保持电容器的短采样时间。另一方面,仿射比使用差分和电压比。因此,偏移误差相互减少。可以以基于乘法器和已知的多通道采样保持放大器的模拟芯片的形式实现所提出的采样保持放大器。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Invariant sample-and-hold amplifier to the hold capacitor discharge
The conventional measurement signal sample-and-hold amplifier comprising a sample and hold circuit in the form of a sample switch, a voltage hold capacitor, and a voltage repeater further includes two similar sample-and-hold circuits of reference voltages. The idea of the proposed amplifier is that hold capacitors are equally discharged in all three sample-and-hold circuits. Therefore, an affine ratio for the stored three voltage samples does not change the intrinsic value over a long discharge time. Then, this invariant affine ratio is taken as the measuring signal. A reproducing (recovery) unit, which is also included, calculates this affine ratio. In turn, the included information signal former shaper pre-converts (prepares) the initial measurement signal using reference voltages. Thus, the hold time is significantly increased, while maintaining a short sample time for the given hold capacitor. On the other hand, the affine ratio uses differences and voltage ratios. Therefore, offset errors are mutually reduced. It is possible to implement the proposed sample-and-hold amplifier in the form of an analog chip based on a multiplier and the known multi-channel sample-and-hold amplifier.
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