Z. Xuan, R. Ding, Yang Liu, T. Baehr‐Jones, M. Hochberg, F. Aflatouni
{"title":"低功耗40gb /s硅光接收机","authors":"Z. Xuan, R. Ding, Yang Liu, T. Baehr‐Jones, M. Hochberg, F. Aflatouni","doi":"10.1109/RFIC.2015.7337768","DOIUrl":null,"url":null,"abstract":"A low-power 40 Gb/s optical receiver is reported. The receiver consists of a broadband photodiode followed by a low-noise transimpedance amplifier front-end, a 3-stage Cherry-Hooper limiting amplifier, an output driver, and an offset cancellation network. The photodiode is fabricated in a 0.18 μm Ge-on-SOI process and the electronic chip is fabricated in a 0.13 μm SiGe BiCMOS process. The receiver consumes 77 mW. The output eye diagram has a 100 mV single-ended opening with input photocurrents as low as 120 μApp.","PeriodicalId":121490,"journal":{"name":"2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-05-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"A low-power 40 Gb/s optical receiver in silicon\",\"authors\":\"Z. Xuan, R. Ding, Yang Liu, T. Baehr‐Jones, M. Hochberg, F. Aflatouni\",\"doi\":\"10.1109/RFIC.2015.7337768\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A low-power 40 Gb/s optical receiver is reported. The receiver consists of a broadband photodiode followed by a low-noise transimpedance amplifier front-end, a 3-stage Cherry-Hooper limiting amplifier, an output driver, and an offset cancellation network. The photodiode is fabricated in a 0.18 μm Ge-on-SOI process and the electronic chip is fabricated in a 0.13 μm SiGe BiCMOS process. The receiver consumes 77 mW. The output eye diagram has a 100 mV single-ended opening with input photocurrents as low as 120 μApp.\",\"PeriodicalId\":121490,\"journal\":{\"name\":\"2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"volume\":\"39 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-05-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC.2015.7337768\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2015.7337768","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A low-power 40 Gb/s optical receiver is reported. The receiver consists of a broadband photodiode followed by a low-noise transimpedance amplifier front-end, a 3-stage Cherry-Hooper limiting amplifier, an output driver, and an offset cancellation network. The photodiode is fabricated in a 0.18 μm Ge-on-SOI process and the electronic chip is fabricated in a 0.13 μm SiGe BiCMOS process. The receiver consumes 77 mW. The output eye diagram has a 100 mV single-ended opening with input photocurrents as low as 120 μApp.
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