用于3D-IC中噪声耦合最小化的垂直螺线管电感

2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) Pub Date : 2015-05-17 DOI:10.1109/RFIC.2015.7337703

G. Yahalom, Alice Wang, U. Ko, A. Chandrakasan

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引用次数: 9

摘要

本文介绍了在三维集成电路(3D-IC)中使用集成电磁电感器来改善噪声缓解。该结构采用双层堆叠28纳米CMOS，采用硅通孔(TSV)制造。该结构作为LC压控振荡器(VCO)的一部分实现，与平面两匝电感器相比，相位噪声改善了6dB，相邻数字时钟线的耦合减少了14dB。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A vertical solenoid inductor for noise coupling minimization in 3D-IC

This paper presents the use of an integrated solenoid inductor in three dimensional integrated circuits (3D-IC) for improved noise mitigation. The structure is fabricated in a two-tier, stacked 28nm CMOS using through silicon vias (TSV). The structure is implemented as part of an LC voltage-controlled oscillator (VCO), and exhibits 6dB improvement in phase noise and 14dB less coupling from adjacent digital clock lines compared to a planar two-turn inductor.

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2015 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)

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