高温下硅堆叠纳米线和纳米片晶体管的建模

2022 IEEE Latin American Electron Devices Conference (LAEDC) Pub Date : 2022-07-04 DOI:10.1109/LAEDC54796.2022.9908193

A. Cerdeira, M. Estrada, Genaro Mariniello Da Silva, J. C. Rodrigues, M. Pavanello

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引用次数: 0

摘要

在这项工作中，我们证明了对称掺杂双栅模型(SDDGM)，之前被验证用于在室温下建模finfet，堆叠纳米线和纳米片晶体管，可以扩展到在高温下建模堆叠纳米线和纳米片晶体管。通过与实验数据的对比，验证了模型的正确性。

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Modeling of silicon stacked nanowire and nanosheet transistors at high temperatures

In this work, we demonstrate that the Symmetric Doped Double-Gate Model (SDDGM), previously validated for modeling FinFETs, stacked nanowire, and nanosheet transistors at room temperature, can be extended for modeling stacked nanowire and nanosheet transistors at high temperatures. The modeled results are validated by comparison with experimental data.

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2022 IEEE Latin American Electron Devices Conference (LAEDC)

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