{"title":"基于绩效的系统设计教育","authors":"Jason J. Hein, J. Aylor, R. Klenke","doi":"10.1109/MSE.2003.1205243","DOIUrl":null,"url":null,"abstract":"This paper describes an integrated performance based modeling tool (PBMT) developed to facilitate the performance-based design of hardware/software systems. It is used to aid in a senior level design project and other design exercises. Task graphs are specified as control flow and/or dataflow with the ability to model real-time applications. The application model is executed on a variety of SystemC architectures for performance analysis.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"91 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Performance-based system design education\",\"authors\":\"Jason J. Hein, J. Aylor, R. Klenke\",\"doi\":\"10.1109/MSE.2003.1205243\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes an integrated performance based modeling tool (PBMT) developed to facilitate the performance-based design of hardware/software systems. It is used to aid in a senior level design project and other design exercises. Task graphs are specified as control flow and/or dataflow with the ability to model real-time applications. The application model is executed on a variety of SystemC architectures for performance analysis.\",\"PeriodicalId\":137611,\"journal\":{\"name\":\"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03\",\"volume\":\"91 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MSE.2003.1205243\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MSE.2003.1205243","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper describes an integrated performance based modeling tool (PBMT) developed to facilitate the performance-based design of hardware/software systems. It is used to aid in a senior level design project and other design exercises. Task graphs are specified as control flow and/or dataflow with the ability to model real-time applications. The application model is executed on a variety of SystemC architectures for performance analysis.