S. Abadal, Albert Mestres, M. Iannazzo, J. Solé-Pareta, E. Alarcón, A. Cabellos-Aparicio
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Evaluating the Feasibility of Wireless Networks-on-Chip Enabled by Graphene
Network-on-Chip (NoC) is currently the paradigm of choice for covering the on-chip communication needs of multicore processors. As we reach the manycore era, though, electrical interconnects present performance and power issues that are exacerbated in the presence of multicast communications due to the point-to-point nature of NoCs. This dramatically limits the available design space in terms of manycore architecture, sparking the need for new solutions. In this direction, the use of wireless interconnects has been recently proposed as a complement of a wired plane. In this paper, the concept of Graphene-enabled Wireless Network-on-Chip (GWNoC) is introduced, which extends the native broadcast capabilities of existing wireless NoCs by enabling the per-core integration of antennas that radiate in the terahertz band (0.1 - 10 THz). Preliminary results on the feasibility of GWNoC are presented, covering implementation, on-chip networking and multiprocessor architecture aspects.