Pekka Miettinen, M. Honkala, J. Roos, Carsten Neff, A. Basermann
{"title":"一种高效的RC-in-RC-out MOR方法的研究与开发","authors":"Pekka Miettinen, M. Honkala, J. Roos, Carsten Neff, A. Basermann","doi":"10.1109/ICECS.2008.4675093","DOIUrl":null,"url":null,"abstract":"This paper outlines the study and development of an efficient RC-in-RC-out model-order reduction (MOR) method suitable for reduction of very large sized RC circuits or the RC circuit parts of a non-RC circuit. The MOR is carried out on a partitioned circuit, which enables the use of low-order moments and macromodels of few elements. This benefit translates to a typical 10-100 times faster simulation with only a minimal error. The performance of the MOR method is evaluated with simulations and compared with other MOR algorithms.","PeriodicalId":404629,"journal":{"name":"2008 15th IEEE International Conference on Electronics, Circuits and Systems","volume":"41 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-11-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Study and development of an efficient RC-in-RC-out MOR method\",\"authors\":\"Pekka Miettinen, M. Honkala, J. Roos, Carsten Neff, A. Basermann\",\"doi\":\"10.1109/ICECS.2008.4675093\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper outlines the study and development of an efficient RC-in-RC-out model-order reduction (MOR) method suitable for reduction of very large sized RC circuits or the RC circuit parts of a non-RC circuit. The MOR is carried out on a partitioned circuit, which enables the use of low-order moments and macromodels of few elements. This benefit translates to a typical 10-100 times faster simulation with only a minimal error. The performance of the MOR method is evaluated with simulations and compared with other MOR algorithms.\",\"PeriodicalId\":404629,\"journal\":{\"name\":\"2008 15th IEEE International Conference on Electronics, Circuits and Systems\",\"volume\":\"41 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-11-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 15th IEEE International Conference on Electronics, Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICECS.2008.4675093\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 15th IEEE International Conference on Electronics, Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.2008.4675093","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Study and development of an efficient RC-in-RC-out MOR method
This paper outlines the study and development of an efficient RC-in-RC-out model-order reduction (MOR) method suitable for reduction of very large sized RC circuits or the RC circuit parts of a non-RC circuit. The MOR is carried out on a partitioned circuit, which enables the use of low-order moments and macromodels of few elements. This benefit translates to a typical 10-100 times faster simulation with only a minimal error. The performance of the MOR method is evaluated with simulations and compared with other MOR algorithms.