{"title":"用于可重构无线系统的15µs快速锁定频率合成器","authors":"Junhua Liu, H. Liao, Ru Huang","doi":"10.1109/ASICON.2009.5351422","DOIUrl":null,"url":null,"abstract":"A fast-locking wideband CMOS frequency synthesizer for reconfigurable wireless applications is presented. An analog coarse tuning loop with a large loop bandwidth is used for fast locking, and new adaptive loop filters are proposed to stabilize the coarse tuning voltage when the loop is switched off. The frequency synthesizer with a 1.95–2.6 GHz frequency range is fabricated in 0.18µm CMOS process and achieves a settling time of 15-µs with loop bandwidth of 100 kHz. So far as we know, this is the fastest locking speed for wideband frequency synthesizers with the same loop bandwidth.1","PeriodicalId":446584,"journal":{"name":"2009 IEEE 8th International Conference on ASIC","volume":"132 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A 15-µs fast-locking frequency synthesizer for reconfigurable wireless systems\",\"authors\":\"Junhua Liu, H. Liao, Ru Huang\",\"doi\":\"10.1109/ASICON.2009.5351422\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A fast-locking wideband CMOS frequency synthesizer for reconfigurable wireless applications is presented. An analog coarse tuning loop with a large loop bandwidth is used for fast locking, and new adaptive loop filters are proposed to stabilize the coarse tuning voltage when the loop is switched off. The frequency synthesizer with a 1.95–2.6 GHz frequency range is fabricated in 0.18µm CMOS process and achieves a settling time of 15-µs with loop bandwidth of 100 kHz. So far as we know, this is the fastest locking speed for wideband frequency synthesizers with the same loop bandwidth.1\",\"PeriodicalId\":446584,\"journal\":{\"name\":\"2009 IEEE 8th International Conference on ASIC\",\"volume\":\"132 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-12-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 IEEE 8th International Conference on ASIC\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASICON.2009.5351422\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 IEEE 8th International Conference on ASIC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASICON.2009.5351422","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 15-µs fast-locking frequency synthesizer for reconfigurable wireless systems
A fast-locking wideband CMOS frequency synthesizer for reconfigurable wireless applications is presented. An analog coarse tuning loop with a large loop bandwidth is used for fast locking, and new adaptive loop filters are proposed to stabilize the coarse tuning voltage when the loop is switched off. The frequency synthesizer with a 1.95–2.6 GHz frequency range is fabricated in 0.18µm CMOS process and achieves a settling time of 15-µs with loop bandwidth of 100 kHz. So far as we know, this is the fastest locking speed for wideband frequency synthesizers with the same loop bandwidth.1