Analytical modeling of gate capacitance and drain current of gate-all-around InxGa1−xAs nanowire MOSFET

Gate-all-around structure with III-V channel material shows improved channel performance with high carrier mobility and less short channel effect and therefore is being studied rigorously for next generation transistors. We propose an analytical model to calculate gate capacitance and drain current of gate-all-around (GAA) nanowire MOSFET, a prospective device to replace the state-of-art FinFET in near future as per ITRS roadmap. The gate capacitance in strong inversion region is modeled incorporating quantum mechanical effects which are verified against the results obtained from self-consistent simulation of Schrödinger-Poisson equation appeared in recent literature. This model can also be extended for calculating gate capacitance in strong inversion region of different Multi-gate MOSFETs. A Spice compatible analytic model for drain current is also proposed which shows excellent agreement with the reported results of experimentally demonstrated In0.53Ga0.47As (2×1016/cm3) GAA MOSFET. Using the proposed formula for gate capacitance in strong inversion region and drain current together with semi-numerical ballistic MOSFET model, the performance of In0.53Ga0.47As (2×1016/cm3) GAA MOSFET is examined. This device is found suitable for ultra-high performance application with very high intrinsic cut-off frequency resulting from very low gate delay and very high on current and gate capacitance. The proposed analytical model of gate capacitance utilizes a modified form of co-axial cable capacitance along with the quantum capacitance limit to form a computationally efficient formula that is in well agreement with the results appeared in recent literature. On the other hand, Landauer-Buttiker formula and compact model for drain current of planar bulk-MOSFET are utilized to form the model for analytic drain current that shows excellent agreement with the experimental results appeared in the literature in recent past. The proposed model can be used for Spice modeling and circuit simulation of In0.53Ga0.47As GAA MOSFET. Moreover, this model is flexible and can be modified for other high performance multi-gate nano-devices.