300GHz晶体管在生产CMOS技术中的性能

B. Jagannathan, D. Chidambarrao, J. Pekarik
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引用次数: 6

摘要

CMOS技术的缩放导致了硅mosfet射频性能的不断提高。超过300GHz的fT和fMAX已经在量产CMOS节点中得到验证[1]。对于LGATE为10nm的超短通道MOSFET,也有400GHz fT的报道[2]。基于CMOS的射频解决方案已经成为1-10GHz频段应用的主流,随着这些器件的射频性能迅速提高,CMOS技术也有可能实现低功耗毫米波应用。本文将回顾最先进的射频mosfet的设计和性能。RF CMOS器件设计依赖于利用数字场效应管设计和几何优化来最大化器件性能。考虑具有寄生电阻的小型信号器件模型,器件的fT可表示为:1/2¿fT=Cin/gm+Cin/gm(rs +rd)gd+(rs+rd)Cgd。即使在LGATE ~ 25nm的fet中,寄生电阻和gd对fT的影响也很小。如果寄生电容可以保持在最小值,则fT=gm/2¿Cin。由这个表达式可以看出,在速度饱和器件中,fT¿1/LGATE。这种对沟道长度的直接依赖一直是fet中fT标度的驱动力。在CMOS节点的状态中,gm还受益于载流子迁移率增强技术。由氮化物衬垫和“应力记忆”引起的通道中的拉应力导致nfet的gm提高了30%[3,4]。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
300GHz Transistor Performance in Production CMOS Technologies
CMOS technology scaling has resulted in a continuous improvement in RF performance of silicon MOSFETs. fT and fMAX in excess of 300GHz has been demonstrated in production CMOS nodes [1]. 400GHz fT for ultra-short channel MOSFET with LGATE of 10nm has also been reported [2]. CMOS based RF solutions are already mainstream for applications in the 1-10GHz regime and with the RF performance of these devices improving rapidly, CMOS technology has the potential to enable low-power mm-wave applications as well. This paper will review the design and performance of state-of-the-art RF MOSFETs. RF CMOS device design relies on leveraging digital FET design coupled with geometry optimization to maximize device performance. COnsidering a small signal device model with parasitic resistances, fT of the device can be expressed as, 1/2¿fT=Cin/gm+Cin/gm(rs +rd)gd+(rs+rd)Cgd. Even in FETs with LGATE ~ 25nm, the parasitic resistances and gd have a minimal impact on fT. If parasitic capacitances can be kept to a minimum then, fT=gm/2¿Cin. From this expression, it can be observed that in velocity saturated devices, fT ¿ 1/LGATE. This direct dependence on channel length has been the driving force for fT scaling in the FETs. in state-of-the CMOS nodes, gm also benefits from carrier mobility enhancement techniques. Tensile stress in the channel induced by nitride liners and "stress-memorization" has resulted in as much as 30% improvement of gm in nFETs [3,4].
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