G. Marinova, V. Guliashki, D. Le Ruyet, M. Bellanger
{"title":"基于FPGA的多载波调制解调器核心","authors":"G. Marinova, V. Guliashki, D. Le Ruyet, M. Bellanger","doi":"10.1109/MELCON.2006.1653037","DOIUrl":null,"url":null,"abstract":"The paper deals with the realization on FPGA of a filter bank based multicarrier modem core. The main blocks of the modem core are for the transmitter: OQAM modulation for transmitter, synthesis filter bank composed from IFFT and polyphase network; and for the receiver: OQAM modulation for receiver, analysis filter bank composed from polyphase network and FFT. The modem core is implemented on FPGA with 106 gates and its frequency is 7.34 kHz per frame with 512 real data","PeriodicalId":299928,"journal":{"name":"MELECON 2006 - 2006 IEEE Mediterranean Electrotechnical Conference","volume":"63 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Multicarrier modem core on FPGA\",\"authors\":\"G. Marinova, V. Guliashki, D. Le Ruyet, M. Bellanger\",\"doi\":\"10.1109/MELCON.2006.1653037\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The paper deals with the realization on FPGA of a filter bank based multicarrier modem core. The main blocks of the modem core are for the transmitter: OQAM modulation for transmitter, synthesis filter bank composed from IFFT and polyphase network; and for the receiver: OQAM modulation for receiver, analysis filter bank composed from polyphase network and FFT. The modem core is implemented on FPGA with 106 gates and its frequency is 7.34 kHz per frame with 512 real data\",\"PeriodicalId\":299928,\"journal\":{\"name\":\"MELECON 2006 - 2006 IEEE Mediterranean Electrotechnical Conference\",\"volume\":\"63 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-05-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"MELECON 2006 - 2006 IEEE Mediterranean Electrotechnical Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MELCON.2006.1653037\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"MELECON 2006 - 2006 IEEE Mediterranean Electrotechnical Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MELCON.2006.1653037","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The paper deals with the realization on FPGA of a filter bank based multicarrier modem core. The main blocks of the modem core are for the transmitter: OQAM modulation for transmitter, synthesis filter bank composed from IFFT and polyphase network; and for the receiver: OQAM modulation for receiver, analysis filter bank composed from polyphase network and FFT. The modem core is implemented on FPGA with 106 gates and its frequency is 7.34 kHz per frame with 512 real data