基于FPGA的多载波调制解调器核心

G. Marinova, V. Guliashki, D. Le Ruyet, M. Bellanger
{"title":"基于FPGA的多载波调制解调器核心","authors":"G. Marinova, V. Guliashki, D. Le Ruyet, M. Bellanger","doi":"10.1109/MELCON.2006.1653037","DOIUrl":null,"url":null,"abstract":"The paper deals with the realization on FPGA of a filter bank based multicarrier modem core. The main blocks of the modem core are for the transmitter: OQAM modulation for transmitter, synthesis filter bank composed from IFFT and polyphase network; and for the receiver: OQAM modulation for receiver, analysis filter bank composed from polyphase network and FFT. The modem core is implemented on FPGA with 106 gates and its frequency is 7.34 kHz per frame with 512 real data","PeriodicalId":299928,"journal":{"name":"MELECON 2006 - 2006 IEEE Mediterranean Electrotechnical Conference","volume":"63 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Multicarrier modem core on FPGA\",\"authors\":\"G. Marinova, V. Guliashki, D. Le Ruyet, M. Bellanger\",\"doi\":\"10.1109/MELCON.2006.1653037\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The paper deals with the realization on FPGA of a filter bank based multicarrier modem core. The main blocks of the modem core are for the transmitter: OQAM modulation for transmitter, synthesis filter bank composed from IFFT and polyphase network; and for the receiver: OQAM modulation for receiver, analysis filter bank composed from polyphase network and FFT. The modem core is implemented on FPGA with 106 gates and its frequency is 7.34 kHz per frame with 512 real data\",\"PeriodicalId\":299928,\"journal\":{\"name\":\"MELECON 2006 - 2006 IEEE Mediterranean Electrotechnical Conference\",\"volume\":\"63 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-05-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"MELECON 2006 - 2006 IEEE Mediterranean Electrotechnical Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MELCON.2006.1653037\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"MELECON 2006 - 2006 IEEE Mediterranean Electrotechnical Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MELCON.2006.1653037","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5

摘要

本文研究了一种基于滤波器组的多载波调制解调器核心在FPGA上的实现。调制解调器核心的主要模块是发射机:发射机的OQAM调制,由IFFT和多相网络组成的合成滤波器组;接收机采用OQAM调制、多相网络和FFT组成的分析滤波器组。调制解调器核心是在FPGA上实现的,有106个门,频率为7.34 kHz /帧,512个真实数据
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Multicarrier modem core on FPGA
The paper deals with the realization on FPGA of a filter bank based multicarrier modem core. The main blocks of the modem core are for the transmitter: OQAM modulation for transmitter, synthesis filter bank composed from IFFT and polyphase network; and for the receiver: OQAM modulation for receiver, analysis filter bank composed from polyphase network and FFT. The modem core is implemented on FPGA with 106 gates and its frequency is 7.34 kHz per frame with 512 real data
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信