基于Xilinx Series 7 fpga的串行QDR LVDS高速adc

R. Melo, B. Valinoti
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引用次数: 2

摘要

高速adc被广泛应用于计量领域,为了读取和处理从高速adc传输的大量数据,FPGA作为解决这类应用的最佳平台被提出,因为FPGA包含了先进的硬块资源,如通信接口、千兆收发器、SerializerlDeserializer、时钟管理器等。在本文中,我们提出了一种使用四倍数据速率低电压差分信号接口来连接串行高速adc的方法。支持来自Abaco Systems的FMC16x板,基于德州仪器16位@ 250 MS/s的ADS42LB69 ADC,使用Xilinx ZC706板。该设计的灵感来自赛灵思的应用笔记,这些笔记经过修订,主要基于7系列特定原语的使用。描述了核心和验证系统的开发,以及与从PC机使用Python脚本获取数据,计算快速傅里叶变换和绘制所获得样本相关的测试。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Serial QDR LVDS High-Speed ADCs on Xilinx Series 7 FPGAs
High-speed ADCs are widely used in the metrology field, and in order to read and process the amount of data delivered from them, FPGA usage is presented as an optimal platform to give solution to this kind of applications, due the inclusion of advanced hard block resources such as communication interfaces, Gigabit transceivers, SerializerlDeserializer, clock managers, among others. In this paper, we propose a method to interface Serial High-Speed ADCs using Quadruple Data Rate Low Voltage Differential Signalling interfaces. Support was given to FMC16x boards from Abaco Systems, based on a Texas Instruments ADS42LB69 ADC of 16-bit @ 250 MS/s, using the Xilinx ZC706 board. The design was inspired in Xilinx application notes, which are revised, and is mainly based on the use of specific primitives of the 7 Series. The development of the core and a validation system are described, as well as tests related to getting data with a Python script from the PC, calculation of the Fast Fourier Transform and plot of the obtained samples.
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