{"title":"基于gpu的n检测过渡故障ATPG","authors":"Kuan-Yu Liao, Sheng-Chang Hsu, C. Li","doi":"10.1145/2463209.2488769","DOIUrl":null,"url":null,"abstract":"This is a massively parallel ATPG that explores device-level, block-level and word-level parallelism in GPU. Eight-detect transition fault ATPG experiments on large benchmark circuits show that our technique achieved 5.6 and 1.6 times speedup compared with a single-core and 8-core CPU commercial tool, respectively. Test patterns selected from our test set are about the same length and quality as those selected from commercial N-detect ATPG. To the best of our knowledge, this is the first proposed GPU-based ATPG algorithm.","PeriodicalId":320207,"journal":{"name":"2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-05-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"GPU-based N-detect transition fault ATPG\",\"authors\":\"Kuan-Yu Liao, Sheng-Chang Hsu, C. Li\",\"doi\":\"10.1145/2463209.2488769\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This is a massively parallel ATPG that explores device-level, block-level and word-level parallelism in GPU. Eight-detect transition fault ATPG experiments on large benchmark circuits show that our technique achieved 5.6 and 1.6 times speedup compared with a single-core and 8-core CPU commercial tool, respectively. Test patterns selected from our test set are about the same length and quality as those selected from commercial N-detect ATPG. To the best of our knowledge, this is the first proposed GPU-based ATPG algorithm.\",\"PeriodicalId\":320207,\"journal\":{\"name\":\"2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)\",\"volume\":\"23 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-05-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/2463209.2488769\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/2463209.2488769","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This is a massively parallel ATPG that explores device-level, block-level and word-level parallelism in GPU. Eight-detect transition fault ATPG experiments on large benchmark circuits show that our technique achieved 5.6 and 1.6 times speedup compared with a single-core and 8-core CPU commercial tool, respectively. Test patterns selected from our test set are about the same length and quality as those selected from commercial N-detect ATPG. To the best of our knowledge, this is the first proposed GPU-based ATPG algorithm.