产品可靠性和最大电压限制从外部栅极氧化物电压斜坡数据

R. Hijab
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引用次数: 5

摘要

先前应用于TDDB恒定电压数据的故障率方法扩展到VRAMP数据,以获得给定电源电压和栅极氧化区域的故障率,或者相反,给定故障率下的最大电源电压。还可以确定占据芯片面积一小部分的子电路的最大电压限制。方法采用有效氧化层厚度模型和统一的TDDB模型,其中低场以e模型为主,高场以1/ e模型为主。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Product reliability and maximum voltage limits from extrinsic gate oxide voltage ramp data
The failure rate methodology applied previously to TDDB constant voltage data is extended to VRAMP data, to obtain the failure rate for a given supply voltage and gate oxide area or conversely, the maximum supply voltage for a given failure rate. The maximum voltage limit for sub-circuits occupying a small fraction of the chip area can also be determined. The methodology relies on the effective-oxide-thickness model and the unified TDDB model, where the E-model dominates at low fields and the 1/E-model dominates at high field.
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