{"title":"电子可调谐电位器的简单解析建模及本体因素影响","authors":"J. Sousa, J. Martino, P. Agopian","doi":"10.1109/LAEDC51812.2021.9437909","DOIUrl":null,"url":null,"abstract":"This paper presents a simple analytical modelling of a Electronically Tunable Potentiometer (ETP) circuit, made of a pseudo-resistor pair and a feedback mechanism that keeps resistance invariant to common mode voltage. The modelling utilizes the first order quadratic equations for the MOS transistor. In order to validate the analytical model, a Verilog-A model was written using the same MOS equations, and later matched to the ibm 130nm technology node resulting in a satisfactory approximation, with relative errors within 15%. Analysis of the ETP control voltage, pseudo-resistor current and pseudo-resistor resistance using the simple model were performed as a function of body factor. When the body factor decreases (better gate to channel electrostatic coupling) the pseudo-resistance increases for the same silicon chip area.","PeriodicalId":112590,"journal":{"name":"2021 IEEE Latin America Electron Devices Conference (LAEDC)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-04-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Simple Analytical Modelling of an Electronically Tunable Potentiometer and Body Factor Influence\",\"authors\":\"J. Sousa, J. Martino, P. Agopian\",\"doi\":\"10.1109/LAEDC51812.2021.9437909\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a simple analytical modelling of a Electronically Tunable Potentiometer (ETP) circuit, made of a pseudo-resistor pair and a feedback mechanism that keeps resistance invariant to common mode voltage. The modelling utilizes the first order quadratic equations for the MOS transistor. In order to validate the analytical model, a Verilog-A model was written using the same MOS equations, and later matched to the ibm 130nm technology node resulting in a satisfactory approximation, with relative errors within 15%. Analysis of the ETP control voltage, pseudo-resistor current and pseudo-resistor resistance using the simple model were performed as a function of body factor. When the body factor decreases (better gate to channel electrostatic coupling) the pseudo-resistance increases for the same silicon chip area.\",\"PeriodicalId\":112590,\"journal\":{\"name\":\"2021 IEEE Latin America Electron Devices Conference (LAEDC)\",\"volume\":\"4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-04-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 IEEE Latin America Electron Devices Conference (LAEDC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/LAEDC51812.2021.9437909\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE Latin America Electron Devices Conference (LAEDC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/LAEDC51812.2021.9437909","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Simple Analytical Modelling of an Electronically Tunable Potentiometer and Body Factor Influence
This paper presents a simple analytical modelling of a Electronically Tunable Potentiometer (ETP) circuit, made of a pseudo-resistor pair and a feedback mechanism that keeps resistance invariant to common mode voltage. The modelling utilizes the first order quadratic equations for the MOS transistor. In order to validate the analytical model, a Verilog-A model was written using the same MOS equations, and later matched to the ibm 130nm technology node resulting in a satisfactory approximation, with relative errors within 15%. Analysis of the ETP control voltage, pseudo-resistor current and pseudo-resistor resistance using the simple model were performed as a function of body factor. When the body factor decreases (better gate to channel electrostatic coupling) the pseudo-resistance increases for the same silicon chip area.