具有负电导增益增强的高增益CMOS运算放大器

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285) Pub Date : 2002-08-07 DOI:10.1109/CICC.2002.1012835

J. Yan, R. Geiger

{"title":"具有负电导增益增强的高增益CMOS运算放大器","authors":"J. Yan, R. Geiger","doi":"10.1109/CICC.2002.1012835","DOIUrl":null,"url":null,"abstract":"A fully differential CMOS operational amplifier using a negative conductance gain enhancement technique is presented. The amplifier was fabricated in an AMI 0.5 /spl mu/m CMOS process with an active area of 0.17 mm/sup 2/. With a 3 V supply, a DC gain of more than 80 dB was measured. The gain exceeded 60 dB for a 240 mV output swing.","PeriodicalId":209025,"journal":{"name":"Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"24","resultStr":"{\"title\":\"A high gain CMOS operational amplifier with negative conductance gain enhancement\",\"authors\":\"J. Yan, R. Geiger\",\"doi\":\"10.1109/CICC.2002.1012835\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A fully differential CMOS operational amplifier using a negative conductance gain enhancement technique is presented. The amplifier was fabricated in an AMI 0.5 /spl mu/m CMOS process with an active area of 0.17 mm/sup 2/. With a 3 V supply, a DC gain of more than 80 dB was measured. The gain exceeded 60 dB for a 240 mV output swing.\",\"PeriodicalId\":209025,\"journal\":{\"name\":\"Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)\",\"volume\":\"40 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-08-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"24\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.2002.1012835\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.2002.1012835","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 24

摘要

提出了一种采用负电导增益增强技术的全差分CMOS运算放大器。该放大器采用AMI 0.5 /spl mu/m CMOS工艺制作，有源面积为0.17 mm/sup / 2/。在3v电源下，测量到的直流增益超过80db。240 mV输出摆幅的增益超过60 dB。

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A high gain CMOS operational amplifier with negative conductance gain enhancement

A fully differential CMOS operational amplifier using a negative conductance gain enhancement technique is presented. The amplifier was fabricated in an AMI 0.5 /spl mu/m CMOS process with an active area of 0.17 mm/sup 2/. With a 3 V supply, a DC gain of more than 80 dB was measured. The gain exceeded 60 dB for a 240 mV output swing.

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Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)

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