1.2V, 10.8mW, 500kHz Sigma-Delta调制器，SNDR 84dB, SFDR 96dB

2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers. Pub Date : 2006-06-15 DOI:10.1109/VLSIC.2006.1705360

C. Tsang, Y. Chiu, B. Nikolić

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引用次数: 7

摘要

1.2V开关电容sigma-delta调制器在0.13mum 6M1P通用CMOS工艺下，以1ms /s的速度实现96dB峰值SFDR和84dB峰值SNDR。高线性度是通过使用高增益运算放大器和自举采样开关实现的。时钟频率为64MHz时，不含参考电压，功耗为10.8mW

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A 1.2V, 10.8mW, 500kHz Sigma-Delta Modulator with 84dB SNDR and 96dB SFDR

A 1.2V switched-capacitor sigma-delta modulator achieves 96dB peak SFDR and 84dB peak SNDR at 1 MS/s in a 0.13mum 6M1P general-purpose CMOS process. The high linearity is achieved by using high-gain op-amps and bootstrapped sampling switches. The power dissipation is 10.8mW at 64MHz clock frequency, excluding the voltage references

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2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers.

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