数字设计学生课程中FPGA模块验证的自适应虚拟设备平台

Ž. Hocenski, I. Aleksi, V. Sruk
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引用次数: 2

摘要

本文介绍了一种基于FPGA的验证平台,用于提高学生在FPGA数字设计课程中的学习效率。我们开发了一个功能验证平台,它扩展了I/O设备的数量,这通常局限于开发套件。采用基于PicoBlaze cpu的简单设计,实现PC机与FPGA之间的输入输出信号同步。完整的验证平台只占Spartan 3 XC3S200 FPGA器件的14%。在课程中,学生获得有关PicoBlaze CPU及其汇编语言的知识,以及熟悉fpga和VHDL。在讲座结束时,学生能够理解硬件/软件协同设计,并使用验证平台制作他们的最终项目。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Adaptive Virtual Devices Platform for verification of FPGA modules in student courses on Digital Design
This paper describes the FPGA based verification platform that is dedicated to improve student efficiency for the course on Digital Design with FPGAs. We developed a functional verification platform that extends the number of I/O devices, which is usually limited on development kits. Simple PicoBlaze CPU-based design is used to synchronize the input and output signals between PC and the FPGA. Complete verification platform occupies only 14% of the Spartan 3 XC3S200 FPGA device. During the course, students get the knowledge about the PicoBlaze CPU and it's assembly language, as well as getting familiar with the FPGAs and VHDL. At the end of the lectures, students are able to understand the HW/SW co-design and to use the verification platform for making their final project.
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