{"title":"一种用于MOS/LSI自动交互布局的便携式软件系统","authors":"H. Beke, W. Sansen","doi":"10.1109/DAC.1979.1600095","DOIUrl":null,"url":null,"abstract":"CALMOS (Computer Aided Layout of MOS) is a computer system for the layout of custom MOS/LSI circuits. Starting with a standard cell library and a simple circuit connectivity description, the program performs various automatic and/or interactive procedures such as initial placement, assignment of equivalent and equipotential pins, optimization of the placement, prerouting, routing, routing compression, fan in fan out and crosstalk verification and circuit verification. The database has reentrant properties such that a designer can step through the system and try out different possibilities. After each step the results are immediately available and can be compared with previous outputs. This on-line optimization avoids multiple rerunning of the task and will also yield a better chip minimization. CALMOS is written in standard FORTRAN and only needs 32K (16 bit) of memory (300 cell version) together with simple overlay facilities. As a result it can easily be installed on almost any existing computersystem. Because of this portability, the algorithmic strength and the modularity of CALMOS is successfully combined with the on-line interactive facilities of existing graphic systems. Such an integration which is actually under development, will allow for the creation of a stand alone integrated minicomputer based LSI design system. It will be based on a common design language and include logic simulation, layout, circuit analysis, design rule checking, logic verification and test pattern generation.","PeriodicalId":345241,"journal":{"name":"16th Design Automation Conference","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1979-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":"{\"title\":\"CALMOS : A Portable Software System for the Automatic and Interactive Layout of MOS/LSI\",\"authors\":\"H. Beke, W. Sansen\",\"doi\":\"10.1109/DAC.1979.1600095\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"CALMOS (Computer Aided Layout of MOS) is a computer system for the layout of custom MOS/LSI circuits. Starting with a standard cell library and a simple circuit connectivity description, the program performs various automatic and/or interactive procedures such as initial placement, assignment of equivalent and equipotential pins, optimization of the placement, prerouting, routing, routing compression, fan in fan out and crosstalk verification and circuit verification. The database has reentrant properties such that a designer can step through the system and try out different possibilities. After each step the results are immediately available and can be compared with previous outputs. This on-line optimization avoids multiple rerunning of the task and will also yield a better chip minimization. CALMOS is written in standard FORTRAN and only needs 32K (16 bit) of memory (300 cell version) together with simple overlay facilities. As a result it can easily be installed on almost any existing computersystem. Because of this portability, the algorithmic strength and the modularity of CALMOS is successfully combined with the on-line interactive facilities of existing graphic systems. Such an integration which is actually under development, will allow for the creation of a stand alone integrated minicomputer based LSI design system. It will be based on a common design language and include logic simulation, layout, circuit analysis, design rule checking, logic verification and test pattern generation.\",\"PeriodicalId\":345241,\"journal\":{\"name\":\"16th Design Automation Conference\",\"volume\":\"16 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1979-06-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"19\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"16th Design Automation Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DAC.1979.1600095\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"16th Design Automation Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DAC.1979.1600095","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
CALMOS : A Portable Software System for the Automatic and Interactive Layout of MOS/LSI
CALMOS (Computer Aided Layout of MOS) is a computer system for the layout of custom MOS/LSI circuits. Starting with a standard cell library and a simple circuit connectivity description, the program performs various automatic and/or interactive procedures such as initial placement, assignment of equivalent and equipotential pins, optimization of the placement, prerouting, routing, routing compression, fan in fan out and crosstalk verification and circuit verification. The database has reentrant properties such that a designer can step through the system and try out different possibilities. After each step the results are immediately available and can be compared with previous outputs. This on-line optimization avoids multiple rerunning of the task and will also yield a better chip minimization. CALMOS is written in standard FORTRAN and only needs 32K (16 bit) of memory (300 cell version) together with simple overlay facilities. As a result it can easily be installed on almost any existing computersystem. Because of this portability, the algorithmic strength and the modularity of CALMOS is successfully combined with the on-line interactive facilities of existing graphic systems. Such an integration which is actually under development, will allow for the creation of a stand alone integrated minicomputer based LSI design system. It will be based on a common design language and include logic simulation, layout, circuit analysis, design rule checking, logic verification and test pattern generation.