Energy and bandwidth aware mapping of IPs onto regular NoC architectures using Multi-Objective Genetic Algorithms

This paper presents energy and bandwidth aware topo-logical mapping of Intellectual Properties (IPs) onto regular tile-based Network-on-Chip (NoC) architectures. One-one mapping as well as many-many mapping are being taken in to consideration between switches and tiles in the proposed approach. In view of minimizing energy and link bandwidth requirements of the NoC-based designs, the approach focuses both the computational and communication synthesis. A Multi-Objective Genetic Algorithms (MOGA) based technique is used to find optimal solution from the pareto-optimal solutions. This technique has been implemented and evaluated for randomly generated benchmarks as well as real-life applications like multi-media system (MMS). The experimental results demonstrate savings up to 70% and 20% of energy and link bandwidth respectively. These results include performance evaluation of One-One vs. Many-Many mapping that clearly shows the effectiveness of the proposed approach.