FPGA implementation of sequence-to-sequence predicting spiking neural networks

We propose a hardware-efficient method to implement sequence-predicting spiking neural networks (SPSNN) on a field-programmable gate array board. The SPSNN is capable of sequence-to-sequence prediction (associative recall) when fully trained using the learning by backpropagating action potential (LbAP) algorithm. The key to the hardware-efficiency lies in the rule-based event (routing) method in place of conventional lookup-table-based methods which are memory-hungry methods, particularly, when both forward and inverse lookups should be considered.