EXPRESS: DPU设计空间探索的CNN执行时间预测

Shikha Goel, Rajesh Kedia, Rijurekha Sen, M. Balakrishnan
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引用次数: 0

摘要

Xilinx的深度学习处理器单元(DPUs)是用于fpga的设计时可配置CNN加速器。我们提出了EXPRESS,它可以预测任何给定CNN在DPU上的执行时间。EXPRESS将总线连接的影响纳入预测。由于DPU被主机CPU调用逐层处理CNN, EXPRESS考虑CPU和DPU的执行时间来预测端到端处理时间。EXPRESS的平均预测误差为2.2%,明显优于最先进的技术。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
EXPRESS: CNN EXecution Time PREdiction for DPU DeSign Space Exploration
Deep learning Processor Units (DPUs) from Xilinx are design-time configurable CNN accelerators for FPGAs. We propose EXPRESS, which predicts the execution time of any given CNN on a DPU. EXPRESS incorporates the effect of bus connections into prediction. As a DPU is invoked by a host CPU to process a CNN layer by layer, EXPRESS considers the CPU and the DPU execution time for predicting the end-to-end processing time. EXPRESS has an average prediction error of 2.2% and significantly outperforms state-of-the-art.
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