有效应用时域测试的子块重构

J. Anders, Shaji Krishnan, G. Gronthoud
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引用次数: 0

摘要

在确定正弦测试刺激的最佳频率时,交流灵敏度指导大多数模拟自动测试模式发生器(AATPG)。这样确定的最佳频率通常位于电路工作频率的附近。虽然这些频率在电路原理上是合理的,但这些测试频率并没有为模拟和射频测试的廉价替代品(低频测试信号和更便宜的测量设备)的最终目标带来任何附加价值。在本文中,我们建议重新配置电路块,以这样一种方式,即各自子块的工作频率被转移到较低的可测试频率。我们已经在卫星接收器电路的子块上验证了我们的建议,结果将相应子块的测试频率从12 GHz降低到4MHz,同时获得相同级别的缺陷覆盖
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Re-Configuration of Sub-blocks for Effective Application of Time Domain Tests
AC sensitivities guide most analogue automatic test pattern generator (AATPG) while determining the optimal frequencies of a sinusoidal test stimulus. The optimal frequencies thus determined, normally lie in the close vicinity of the operating frequency of the circuit. Although these frequencies are justifiable by the principles of the circuit, these test frequencies do not bring any added value to the ultimate goal of cheap alternatives (low frequency test signal and cheaper measurement equipment) for the analogue and RF tests. In this paper, we propose to re-configure the circuit blocks, in such a way that the operating frequencies of the respective sub-block are shifted to lower testable frequencies. We have validated our proposal on a sub-block of a satellite receiver circuit that resulted in lowering the test frequencies of the corresponding sub-blocks from 12 GHz to 4MHz, while attaining the same level of defect coverage
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