基于fpga的软硬件协同设计方法对电力系统信号进行实时高精度谐波分析

E. Anjum, F. Khan, Z. Khan
{"title":"基于fpga的软硬件协同设计方法对电力系统信号进行实时高精度谐波分析","authors":"E. Anjum, F. Khan, Z. Khan","doi":"10.1109/INMIC.2012.6511447","DOIUrl":null,"url":null,"abstract":"Increase in use of nonlinear devices in power systems has caused serious harmonic pollution. There is always a need to measure these harmonics for power quality assessment and in cases for mitigating these harmonics. The problem of precision measurement becomes irksome because of effects of frequency deviation. Over the course of time a whole slew of digital signal processing algorithms have been proposed to accurately analyze harmonics in scenarios of frequency deviation but they come with a much increased cost in computational complexity. These computational requirements make them impractical for use in real-time monitoring systems. A computationally complex but highly precise algorithm has been selected for integration into real-time harmonic analysis systems. Due to its complexity it owes its suitability only in offline harmonic analysis system. We have proposed a scheme to realize this algorithm in a manner so that it meets real-time constraints. We have partitioned the algorithm using a Hardware/Software (HW/SW) Co-Design methodology to optimize performance and resource utilization. The design fits well onto low cost Field Programmable Gate Arrays (FPGAs) which have moderate resource count. The computational time advantage achieved by our scheme is compared with an embedded software implementation and performance gain has been presented.","PeriodicalId":396084,"journal":{"name":"2012 15th International Multitopic Conference (INMIC)","volume":"207 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Real time high precision harmonic analysis of signals in power systems using HW/SW Co-Design methodology on FPGAs\",\"authors\":\"E. Anjum, F. Khan, Z. Khan\",\"doi\":\"10.1109/INMIC.2012.6511447\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Increase in use of nonlinear devices in power systems has caused serious harmonic pollution. There is always a need to measure these harmonics for power quality assessment and in cases for mitigating these harmonics. The problem of precision measurement becomes irksome because of effects of frequency deviation. Over the course of time a whole slew of digital signal processing algorithms have been proposed to accurately analyze harmonics in scenarios of frequency deviation but they come with a much increased cost in computational complexity. These computational requirements make them impractical for use in real-time monitoring systems. A computationally complex but highly precise algorithm has been selected for integration into real-time harmonic analysis systems. Due to its complexity it owes its suitability only in offline harmonic analysis system. We have proposed a scheme to realize this algorithm in a manner so that it meets real-time constraints. We have partitioned the algorithm using a Hardware/Software (HW/SW) Co-Design methodology to optimize performance and resource utilization. The design fits well onto low cost Field Programmable Gate Arrays (FPGAs) which have moderate resource count. The computational time advantage achieved by our scheme is compared with an embedded software implementation and performance gain has been presented.\",\"PeriodicalId\":396084,\"journal\":{\"name\":\"2012 15th International Multitopic Conference (INMIC)\",\"volume\":\"207 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 15th International Multitopic Conference (INMIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/INMIC.2012.6511447\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 15th International Multitopic Conference (INMIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/INMIC.2012.6511447","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

摘要

电力系统中非线性装置的使用越来越多,造成了严重的谐波污染。在电能质量评估和缓解这些谐波的情况下,总是需要测量这些谐波。由于频率偏差的影响,精密测量问题变得十分棘手。随着时间的推移,人们提出了大量的数字信号处理算法来准确地分析频率偏差情况下的谐波,但它们的计算复杂性大大增加。这些计算要求使得它们在实时监控系统中不实用。选择了一种计算复杂但精度高的算法集成到实时谐波分析系统中。由于其复杂性,它仅适用于离线谐波分析系统。我们提出了一种满足实时约束的算法实现方案。我们使用硬件/软件(HW/SW)协同设计方法对算法进行了分区,以优化性能和资源利用率。该设计非常适合低成本的现场可编程门阵列(fpga),具有适度的资源计数。将该方案与嵌入式软件实现的计算时间优势进行了比较,并给出了性能增益。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Real time high precision harmonic analysis of signals in power systems using HW/SW Co-Design methodology on FPGAs
Increase in use of nonlinear devices in power systems has caused serious harmonic pollution. There is always a need to measure these harmonics for power quality assessment and in cases for mitigating these harmonics. The problem of precision measurement becomes irksome because of effects of frequency deviation. Over the course of time a whole slew of digital signal processing algorithms have been proposed to accurately analyze harmonics in scenarios of frequency deviation but they come with a much increased cost in computational complexity. These computational requirements make them impractical for use in real-time monitoring systems. A computationally complex but highly precise algorithm has been selected for integration into real-time harmonic analysis systems. Due to its complexity it owes its suitability only in offline harmonic analysis system. We have proposed a scheme to realize this algorithm in a manner so that it meets real-time constraints. We have partitioned the algorithm using a Hardware/Software (HW/SW) Co-Design methodology to optimize performance and resource utilization. The design fits well onto low cost Field Programmable Gate Arrays (FPGAs) which have moderate resource count. The computational time advantage achieved by our scheme is compared with an embedded software implementation and performance gain has been presented.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信