高速逻辑的设计问题

Proceedings of WESCON '94 Pub Date : 1994-09-27 DOI:10.1109/WESCON.1994.403526

D. Wyland

{"title":"高速逻辑的设计问题","authors":"D. Wyland","doi":"10.1109/WESCON.1994.403526","DOIUrl":null,"url":null,"abstract":"Faster CPU's have put a strain on the ability of glue logic to support them. The old method of just making the glue logic faster doesn't work anymore. This problem has generated new solutions in the form of innovative analog design applied to digital applications. This paper explores one of these innovations, the Ultra Fast Buffer.<<ETX>>","PeriodicalId":136567,"journal":{"name":"Proceedings of WESCON '94","volume":"26 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-09-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design issues with high speed logic\",\"authors\":\"D. Wyland\",\"doi\":\"10.1109/WESCON.1994.403526\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Faster CPU's have put a strain on the ability of glue logic to support them. The old method of just making the glue logic faster doesn't work anymore. This problem has generated new solutions in the form of innovative analog design applied to digital applications. This paper explores one of these innovations, the Ultra Fast Buffer.<<ETX>>\",\"PeriodicalId\":136567,\"journal\":{\"name\":\"Proceedings of WESCON '94\",\"volume\":\"26 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-09-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of WESCON '94\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/WESCON.1994.403526\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of WESCON '94","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WESCON.1994.403526","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 0

摘要

更快的CPU给胶水逻辑的能力带来了压力。仅仅使粘合逻辑更快的旧方法不再起作用了。这个问题产生了新的解决方案，以创新的模拟设计的形式应用于数字应用。本文探讨了这些创新之一，超快速缓冲器

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Design issues with high speed logic

Faster CPU's have put a strain on the ability of glue logic to support them. The old method of just making the glue logic faster doesn't work anymore. This problem has generated new solutions in the form of innovative analog design applied to digital applications. This paper explores one of these innovations, the Ultra Fast Buffer.<>

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

Proceedings of WESCON '94

自引率

0.00%

发文量