一种新型CMOS四象限差分模拟乘法器

A. N. Saatlo, Abolfazl Amiri, Loghman Asadpour
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引用次数: 3

摘要

本文提出了一种基于CMOS技术的新型对称结构的四象限模拟乘法器电路。该电路适用于低电压和低功耗应用。由于电路工作在饱和区而不是弱反转区,因此与已有的相关文献相比,电路的动态输入输出范围得到了提高。高精度是该电路的另一个优点。为了对电路进行仿真,利用HSPICE模拟器在0.18 μm CMOS工艺下验证了理论分析的有效性,在1.5 V电源电压下,电路的输入范围为±400 mV,总功耗为44 μW,相应的非线性保持在1.5%以下。此外,该电路的带宽为196mhz。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A New CMOS four-quadrant analog multiplier with differential output
This paper presents a new four-quadrant analog multiplier circuit based on a new symmetrical configuration designed in CMOS technology. The proposed circuit is suitable for low voltage and low power applications. Compared to the corresponding already published works, the dynamic input and output ranges of the circuit are improved owing to the fact that the circuit works in the saturation region not in weak inversion. High accuracy is the further advantage of the circuit. In order to simulate the circuit, HSPICE simulator is utilized to verify the validity of the theoretical analysis in 0.18 μm CMOS technology, where under supply voltage of 1.5 V, the input range of the proposed circuit is ±400 mV, total power consumption is 44 μW, and the corresponding nonlinearity remains as low as 1.5 %. Moreover, the band-width of the circuit is found to be 196 MHz.
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