8b 100MS/s闪存ADC

1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI:10.1109/ISSCC.1984.1156644

Y. Yoshii, K. Asano, M. Nakamura, C. Yamada

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引用次数: 6

摘要

本文将介绍一种8b闪存ADC，其转换速率为100MHz，输入带宽为30MHz，功耗为1200mW。该电路采用外延- locos工艺实现，最小线宽为2.5μm，集电极电流为45μA，晶体管fto为4GHz。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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An 8b 100MS/s flash ADC

This paper will describe an 8b flash ADC which achieves a conversion rate of 100MHz arid an input bandwidth of 30MHz at a power dissipation of 1200mW. The circuit is realized in an epitaxial-LOCOS process with a minimum line width of 2.5μm and a transistor fTof 4GHz at 45μA collector current.

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1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

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