A Platform based on HLS to Implement a Generic CNN on an FPGA

The fast progress in modern applications based on convolution neural network poses new challenges, such as higher precision and real-time response. On the other hand, advances of Field Programmable Gate Arrays tools allows designs based on High-Level Synthesis, allowing a faster and an easier implementation on hardware of solutions for complex problems. However, a significant amount of time and still some level of hardware design expertise are required to implement a convolution neural network on hardware. To solve this difficulty a platform to emulate a generic parameterizable-based convolution neural network on a programmable gate arrays is developed, giving the freedom to specify the network topology and tune the parameterization. This platform, developed in C language and synthetized through High-Level Synthesis, is prepared to configure a floating-point convolution neural network as a “lego”. This approach became attractive because the designer focuses on the network topology, without in-depth understanding of the underlying hardware a requirement.