采用Si和SiGe选择性蚀刻工艺的管状通道结构的3-D堆叠NAND闪存串

2009 IEEE International Memory Workshop Pub Date : 2009-05-10 DOI:10.1109/IMW.2009.5090571

M. Jeong, H. Kwon, Jong-Ho Lee

{"title":"采用Si和SiGe选择性蚀刻工艺的管状通道结构的3-D堆叠NAND闪存串","authors":"M. Jeong, H. Kwon, Jong-Ho Lee","doi":"10.1109/IMW.2009.5090571","DOIUrl":null,"url":null,"abstract":"A new vertical NAND flash string with tube channel structure and top source contact has been proposed. The DC and program/erase characteristics of the proposed transistor is investigated using a 3-D TCAD simulation tool. This work is expected to show better P/E, retention, and reliability characteristics than Toshiba's structure.","PeriodicalId":113507,"journal":{"name":"2009 IEEE International Memory Workshop","volume":"86 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"3-D Stacked NAND Flash String with Tube Channel Structure Using Si and SiGe Selective Etch Process\",\"authors\":\"M. Jeong, H. Kwon, Jong-Ho Lee\",\"doi\":\"10.1109/IMW.2009.5090571\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new vertical NAND flash string with tube channel structure and top source contact has been proposed. The DC and program/erase characteristics of the proposed transistor is investigated using a 3-D TCAD simulation tool. This work is expected to show better P/E, retention, and reliability characteristics than Toshiba's structure.\",\"PeriodicalId\":113507,\"journal\":{\"name\":\"2009 IEEE International Memory Workshop\",\"volume\":\"86 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-05-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 IEEE International Memory Workshop\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IMW.2009.5090571\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 IEEE International Memory Workshop","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMW.2009.5090571","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 0

摘要

提出了一种具有管状通道结构和顶源接触的新型垂直NAND闪存串。利用三维TCAD仿真工具研究了该晶体管的直流特性和程序/擦除特性。与东芝的结构相比，这项工作有望显示出更好的市盈率、保留率和可靠性特征。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

3-D Stacked NAND Flash String with Tube Channel Structure Using Si and SiGe Selective Etch Process

A new vertical NAND flash string with tube channel structure and top source contact has been proposed. The DC and program/erase characteristics of the proposed transistor is investigated using a 3-D TCAD simulation tool. This work is expected to show better P/E, retention, and reliability characteristics than Toshiba's structure.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2009 IEEE International Memory Workshop

自引率

0.00%

发文量