M. Inoue, J. Tsuchimoto, M. Mizutani, J. Yugami, Y. Ohno, M. Yoneda
{"title":"N2等离子体直接氮化制备超薄SiN栅极电介质","authors":"M. Inoue, J. Tsuchimoto, M. Mizutani, J. Yugami, Y. Ohno, M. Yoneda","doi":"10.1109/IWGI.2003.159184","DOIUrl":null,"url":null,"abstract":"In this study, we used direct nitridation technique using N/sub 2/ plasma to from ultra-thin SiN gate dielectric and successfully fabricated poly-Si gate CMOS device with mass production compatible fabrication flow including source and drain silicidation and 1050/spl deg/C spike anneal. We also studied these SiN gate dielectrics from reliability including dielectric breakdown.","PeriodicalId":221442,"journal":{"name":"Extended Abstracts of International Workshop on Gate Insulator (IEEE Cat. No.03EX765)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Ultra-thin SiN gate dielectric fabricated by N2 plasma direct nitridation\",\"authors\":\"M. Inoue, J. Tsuchimoto, M. Mizutani, J. Yugami, Y. Ohno, M. Yoneda\",\"doi\":\"10.1109/IWGI.2003.159184\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this study, we used direct nitridation technique using N/sub 2/ plasma to from ultra-thin SiN gate dielectric and successfully fabricated poly-Si gate CMOS device with mass production compatible fabrication flow including source and drain silicidation and 1050/spl deg/C spike anneal. We also studied these SiN gate dielectrics from reliability including dielectric breakdown.\",\"PeriodicalId\":221442,\"journal\":{\"name\":\"Extended Abstracts of International Workshop on Gate Insulator (IEEE Cat. No.03EX765)\",\"volume\":\"10 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-12-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Extended Abstracts of International Workshop on Gate Insulator (IEEE Cat. No.03EX765)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IWGI.2003.159184\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Extended Abstracts of International Workshop on Gate Insulator (IEEE Cat. No.03EX765)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWGI.2003.159184","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Ultra-thin SiN gate dielectric fabricated by N2 plasma direct nitridation
In this study, we used direct nitridation technique using N/sub 2/ plasma to from ultra-thin SiN gate dielectric and successfully fabricated poly-Si gate CMOS device with mass production compatible fabrication flow including source and drain silicidation and 1050/spl deg/C spike anneal. We also studied these SiN gate dielectrics from reliability including dielectric breakdown.