K. Sakiyama, P. Schaumont, D. Hwang, I. Verbauwhede
{"title":"教授系统级设计方法的权衡","authors":"K. Sakiyama, P. Schaumont, D. Hwang, I. Verbauwhede","doi":"10.1109/MSE.2003.1205256","DOIUrl":null,"url":null,"abstract":"This paper summarizes two graduate-level class projects in EE201A/EE298 (VLSI Architectures and Design Methods) at the University of California, Los Angeles (UCLA). The purpose of the class is to explore the impact of system-level optimization for various target platforms using EDA.","PeriodicalId":137611,"journal":{"name":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Teaching trade-offs in system-level design methodologies\",\"authors\":\"K. Sakiyama, P. Schaumont, D. Hwang, I. Verbauwhede\",\"doi\":\"10.1109/MSE.2003.1205256\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper summarizes two graduate-level class projects in EE201A/EE298 (VLSI Architectures and Design Methods) at the University of California, Los Angeles (UCLA). The purpose of the class is to explore the impact of system-level optimization for various target platforms using EDA.\",\"PeriodicalId\":137611,\"journal\":{\"name\":\"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03\",\"volume\":\"11 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MSE.2003.1205256\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MSE.2003.1205256","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Teaching trade-offs in system-level design methodologies
This paper summarizes two graduate-level class projects in EE201A/EE298 (VLSI Architectures and Design Methods) at the University of California, Los Angeles (UCLA). The purpose of the class is to explore the impact of system-level optimization for various target platforms using EDA.