An Efficient Truncated MAC using Approximate Adders for Image and Video Processing Applications

This paper deals with less delay and area efficient truncated (MAC) multiplier and accumulator unit for Medical image processing, Gaussian and gradient filter applications. Approximate computing plays a essential role in today's increasing world in order to implement error tolerant energy efficient filter Blocks. In addition to this Truncated based design produce less delay to realize the algorithms for image and video processing applications. This paper shows an efficient delay realization of 16X16 truncated MAC unit using proposed approximate adder. The proposed Truncated MAC is simulated and synthesized with Xilinx 14.7 ISE software. It achieves best area and less delay result when compared with previous approximate adder designs.