{"title":"VLSI无源硅载流子高性能封装","authors":"H. Schettler, V. Kreuter","doi":"10.1109/ESSCIRC.1989.5468199","DOIUrl":null,"url":null,"abstract":"A silion-on-silicon package for 9 VLSI chips is presented. The carrier is especially designed to support the high frequency current surges of complementary logic like CMOS or BICMOS. It contains integrated decoupling capacitors and uses 3 layers of metal. The chips are mounted via `controlled collapse chip connection'. A /370 processor containing 9 CMOS chips has been assembled. Functionality and manufacturability have successfully been demonstrated.","PeriodicalId":187183,"journal":{"name":"ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference","volume":"44 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Passive Silicon Carrier High Performance Package for VLSI\",\"authors\":\"H. Schettler, V. Kreuter\",\"doi\":\"10.1109/ESSCIRC.1989.5468199\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A silion-on-silicon package for 9 VLSI chips is presented. The carrier is especially designed to support the high frequency current surges of complementary logic like CMOS or BICMOS. It contains integrated decoupling capacitors and uses 3 layers of metal. The chips are mounted via `controlled collapse chip connection'. A /370 processor containing 9 CMOS chips has been assembled. Functionality and manufacturability have successfully been demonstrated.\",\"PeriodicalId\":187183,\"journal\":{\"name\":\"ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference\",\"volume\":\"44 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.1989.5468199\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC '89: Proceedings of the 15th European Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.1989.5468199","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Passive Silicon Carrier High Performance Package for VLSI
A silion-on-silicon package for 9 VLSI chips is presented. The carrier is especially designed to support the high frequency current surges of complementary logic like CMOS or BICMOS. It contains integrated decoupling capacitors and uses 3 layers of metal. The chips are mounted via `controlled collapse chip connection'. A /370 processor containing 9 CMOS chips has been assembled. Functionality and manufacturability have successfully been demonstrated.
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