一种5.4GHz ΔΣ Bang-Bang锁相环,采用嵌套锁相环滤波器,带内噪声降低19dB

Xiaohua Huang, Bowen Wang, W. Rhee, Zhihua Wang
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引用次数: 1

摘要

本文提出了一种用于$\Delta \Sigma$分数n bang-bang锁相环(BBPLL)的带内降噪方法,该方法在反馈路径中使用嵌套的整数n BBPLL作为相域低通滤波器(PDLPF)。在65nm CMOS中实现了一个5.4GHz $\Delta \Sigma$分数n BBPLL原型。当PDLPF使能时,提出的$\Delta \Sigma$分数n BBPLL实现了19dB的带内降噪。实验结果表明,PDLPF方法不仅能有效抑制$\Delta \Sigma$分数n BBPLL的带外噪声,还能有效缓解带内噪声的衰减。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A 5.4GHz ΔΣ Bang-Bang PLL with 19dB In-Band Noise Reduction by Using a Nested PLL Filter
This paper presents an in-band noise reduction method for $\Delta \Sigma$ fractional-N bang-bang phase locked loops (BBPLLs) by using a nested integer-N BBPLL in the feedback path that works as a phase-domain low-pass filter (PDLPF). A prototype 5.4GHz $\Delta \Sigma$ fractional-N BBPLL is implemented in 65nm CMOS. The proposed $\Delta \Sigma$ fractional-N BBPLL achieves the in-band noise reduction of 19dB when the PDLPF is enabled. Experimental results show that the PDLPF method is useful for the $\Delta \Sigma$ fractional-N BBPLL not only to suppress the out-of-band noise but also to mitigate the in-band noise degradation.
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