{"title":"开发一个可互操作的sCMOS过程设计工具包和一套开放的标准数字单元","authors":"G. A. Sanca, O. Alpago, M. Garcia-Inza","doi":"10.1109/CAMTA.2016.7574082","DOIUrl":null,"url":null,"abstract":"An Interoperable Process Design Kit (iPDK) was developed for the scalable CMOS process SCN3ME provided by ON Semiconductors, reachable across MOSIS. It includes DRC and LVS rules, SPICE models, technology files, verification and extraction files, execution scripts, symbol library and parametric cells (PCells). Then, using the iPDK, a set of standard digital cells were developed. A test chip was designed and fabricated. Measurements results are presented.","PeriodicalId":108317,"journal":{"name":"2016 Argentine Conference of Micro-Nanoelectronics, Technology and Applications (CAMTA)","volume":"343 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Development of a sCMOS Interoperable Process Design Kit and an open set of standard digital cells\",\"authors\":\"G. A. Sanca, O. Alpago, M. Garcia-Inza\",\"doi\":\"10.1109/CAMTA.2016.7574082\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An Interoperable Process Design Kit (iPDK) was developed for the scalable CMOS process SCN3ME provided by ON Semiconductors, reachable across MOSIS. It includes DRC and LVS rules, SPICE models, technology files, verification and extraction files, execution scripts, symbol library and parametric cells (PCells). Then, using the iPDK, a set of standard digital cells were developed. A test chip was designed and fabricated. Measurements results are presented.\",\"PeriodicalId\":108317,\"journal\":{\"name\":\"2016 Argentine Conference of Micro-Nanoelectronics, Technology and Applications (CAMTA)\",\"volume\":\"343 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 Argentine Conference of Micro-Nanoelectronics, Technology and Applications (CAMTA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CAMTA.2016.7574082\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 Argentine Conference of Micro-Nanoelectronics, Technology and Applications (CAMTA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CAMTA.2016.7574082","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Development of a sCMOS Interoperable Process Design Kit and an open set of standard digital cells
An Interoperable Process Design Kit (iPDK) was developed for the scalable CMOS process SCN3ME provided by ON Semiconductors, reachable across MOSIS. It includes DRC and LVS rules, SPICE models, technology files, verification and extraction files, execution scripts, symbol library and parametric cells (PCells). Then, using the iPDK, a set of standard digital cells were developed. A test chip was designed and fabricated. Measurements results are presented.