5w 5ghz双极微波功率晶体管的电路器件接口技术

G. Schreyer
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引用次数: 3

摘要

使用最先进的电路器件接口技术,可以设计出5w / 5ghz双极微波功率晶体管:图1。该装置使用内部输入和输出匹配电路来组合六个独立晶体管单元的输出功率。晶体管电池是采用难熔金金属化、扩散发射极镇流器电阻器、离子注入基极和扩散磷发射极的互指结构的硅双极器件。使用的最重要的电路技术是将集电极分流电感器直接返回基极键合垫,使输出电流的无功部分不会在共基极装置的共模电感中流动;图2和图3。共模电感电流的减少减少了寄生元件的有害影响,从而增加了增益和稳定性。通过双键直接降低共模电感和通过Be0衬底的VZA孔使基极更直接地返回到地,也增强了增益和稳定性。集电极分流电感的阻塞电容器尽可能靠近晶体管芯片。晶体管和电容器之间的最小距离提供集电极负载阻抗的最大实部变换,从而减少集电极电路其余部分必须忽略的驻波比,并倾向于减少集电极电路中的损耗。此外,集电极匹配网络完全包含在基板上,以允许在内外部电路接口处最小的VSWR,因此减少了该接口的损耗。输入电路是一个最小损耗的低通网络,允许最大的驱动功率传输,同时仍然保持一个可接受的输入匹配。为了使器件的总体热阻最小化,六个晶体管单元被安装在这样的位置,它们之间有很大的物理距离。通过电路优化,该器件能够提供250 mhz的带宽。通过适当的电路优化,应该可以实现超过500 mhz的总带宽。该装置或类似的多单元装置的可能应用是对流层散射或卫星通信系统的发射机放大器,相控阵雷达,或作为熔断器或雷达高度计的功率振荡器。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Circuit device interface techniques for a 5-W 5-GHz bipolar microwave power transistor
THE USE of state-of-the-art circuit device interface techniques has made it possible to design a 5-W/5-GHz bipolar microwave power transistor: Figure 1. The device uses internal input and output matching circuits to combine the output power of six separate transistor cells. The transistor cell is a silicon bipolar device of an interdigitated structure employing refractory gold metalization, diffused emitter ballast resistors, an ion-implanted base, and a diffused phosphorus emitter. The most significant circuit technique used was to return the collector shunt inductor directly to the base bonding pad so that the reactive part of the output current does not flow in the common-mode inductance of the common base device; Figures 2 and 3. This reduction of current in the common-mode inductance reduces the detrimental effects of that parasitic element, allowing increased gain and stability. Gain and stability are also enhanced by the direct reduction of the common-mode inductance by double-bonding and by VZA holes through the Be0 substrate to return the base more directly to ground. The blocking capacitor for the collector shunt inductor is placed as close as possible to the transistor chips. Minimum distance between the transistor and the capacitor provides maximum real part transformation of the collector load impedance which reduces the VSWR that the remainder of the collector circuit must tune out and tends to reduce losses in the collector circuit. Also, the collector matching network is included entirely on the substrate to allow minimum VSWR at the internal-to-external circuit interface, and therefore, reduced losses at that interface. The input circuit is a minimum loss low-pass network allowing maximum transfer of drive power, while still maintaining an acceptable input match. To minimize the overall thermal resistance of the device, the six transistor cells are mounted such that there is a large physical separation between them. This layout provides The device as presented is capable of 250-MHz of bandwidth with circuit optimization. Overall bandwidth of over 500-MHz should be achievable with proper circuit optimization. Possible applications for this device or similar multicell devices are in transmitter amplifiers for troposcatter or satellite communications systems, phased-array radars, or as power oscillators for fuses or radar altimeters.
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