嵌入式可控硅NMOS和低电容ESD保护装置

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285) Pub Date : 2002-08-07 DOI:10.1109/CICC.2002.1012774

Jian-Hsing Lee, Yi-Hsun Wu, K. Peng, R. Chang, Talee Yu, T. Ong

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引用次数: 21

摘要

在NMOS晶体管的漏极区插入n阱和p+扩散，在不改变NMOS直流I-V特性的情况下，成功地开发了嵌入式可控硅NMOS (ESCR NMOS)，并分别为输出板和输入板开发了极低电容(/spl sim/50 fF) ESD保护(LCESD)器件。此外，提出了一种结合电源保护装置和n+保护环的保护方案，并证明了该方案能够在不增加LCESD器件电容的情况下保护四个方向的ESD冲击。

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The embedded SCR NMOS and low capacitance ESD protection device

Inserting the n-well and p+ diffusion into the drain region of NMOS transistor, the embedded SCR NMOS (ESCR NMOS), without changing any DC I-V characteristics of NMOS, and a very low capacitance (/spl sim/50 fF) ESD protection (LCESD) device are developed successfully for output pad and input pad, respectively. In addition, a protection scheme, combining the power protection device and a n+ guard-ring, is proposed and proven to be capable of protecting four directions ESD zapping and without increasing the LCESD device capacitance.

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Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285)

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