基于磁RAM的滤波器设计,用于物联网应用中的低功耗信号处理

S. Rao, K. Shashikanth, Ranjith Srinivas, M. S. Sunita
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引用次数: 0

摘要

由于现代计算系统对更高性能的不断需求,新兴存储技术在过去几年中吸引了很多人的兴趣,并见证了巨大的创新。本文介绍了磁随机存储器(MRAM)的设计及其在基于内存的FIR滤波器中的实现。由于其非挥发性,MRAM在过去十年中获得了极大的兴趣。MRAM使用自旋电子器件磁隧结(MTJ)存储数据。本文利用LLG方程建立了MTJ的数学模型。提出了一种新的MRAM配置3T2MTJ,并利用该配置设计了一种双端口MRAM。采用提出的双端口MRAM设计构建了一个9抽头FIR滤波器。对MRAM单单元、单端口和双端口乘法器以及FIR滤波器的性能进行了评估,并与传统的SRAM系统进行了比较。可以观察到,与基于SRAM的设计相比,使用MRAM的双端口乘法器降低了77%的功耗,并且通过使用MRAM代替SRAM, FIR滤波器的功耗降低了37%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Magnetic RAM based filter design for low power signal processing in IOT applications
Emerging memory technologies have attracted a lot of interest and has witnessed tremendous innovation in the past couple of years due to the continuous demand for greater performance by modern computing systems. This paper presents the design of Magnetic RAM (MRAM) and its implementation in memory based FIR filter. MRAM has obtained significant interest in the past decade due to its non-volatility property. MRAM stores data using spintronic device Magnetic Tunneling Junction (MTJ). In this paper a mathematical model is developed for MTJ using the LLG equation. A new configuration 3T2MTJ for MRAM is proposed and a dual port MRAM is designed using this configuration. A 9-tap FIR filter is constructed using the proposed dual port MRAM design. The performance of MRAM single cell, single and dual port multipliers and FIR filter is evaluated and compared with the conventional SRAM based system. It can be observed that dual port multiplier using MRAM reduces the power consumption by 77% as compared to SRAM based design and the power consumption in FIR filter is reduced by 37% by using MRAM in the place of SRAM.
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