芯片多处理器的运行时3-D堆叠缓存管理

Jongpil Jung, K. Kang, G. Micheli, C. Kyung
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引用次数: 1

摘要

三维(3-D)内存堆叠是解决芯片多处理器内存带宽问题最有前途的解决方案之一。在这项工作中,我们提出了一种高效的运行时三维缓存管理技术,该技术不仅利用了垂直互连的低内存访问延迟,而且利用了应用程序随时间动态变化的运行时内存访问需求。实验结果表明,与私有堆叠缓存配置相比,该方法的性能提高了26.7%,平均提高了13.1%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Runtime 3-D stacked cache management for chip-multiprocessors
Three-dimensional (3-D) memory stacking is one of the most promising solutions to tackle memory bandwidth problems in chip multiprocessors. In this work, we propose an efficient runtime 3-D cache management technique which not only takes advantage of the low memory access latency through vertical interconnections, but also exploits runtime memory access demand of applications which varies dynamically with time. Experimental results show that the proposed method offers performance improvement by up to 26.7% and on average 13.1% compared with a configuration of private stacked cache.
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