低相位噪声宽带压控振荡器65nm射频CMOS低功耗应用

Zhou Mingzhu
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引用次数: 7

摘要

介绍了一种用于低功率和相位噪声应用的宽带LC压控振荡器。采用相位噪声模型进行低相位噪声设计。该电路包括一个开关电容阵列、两个电源和衬底噪声滤波器。通过对MOS通道电流和无槽电阻引入的相位噪声进行建模,给出了电路性能的近似评价。该电路已在标准65纳米CMOS技术中实现。测试结果表明,该压控振荡器的工作频率范围为750mhz ~ 1.5 GHz,在1.21GHz频段的相位噪声为-125.84 dBc/Hz @ 1mhz。该芯片在1.2 V电源下功耗小于2.25 mW,占地面积为0.7 mm2。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A low phase noise wideband VCO in 65nm RF CMOS for low power applications
A wideband LC VCO used in low power and phase noise applications is described. A phase noise model is utilized for its lower phase noise design. A switched capacitor array, two power supply and substrate noise filters are involved in the circuit. The phase noise imported by the MOS channel current and tank less resistance is modeled to give approximate evaluation of the circuit performance. The circuit has been implemented in a standard 65 nm CMOS technology. The test result indicates that the frequency of the VCO is from 750 MHz to 1.5 GHz, and the phase noise is -125.84 dBc/Hz @1 MHz in 1.21GHz. The chip consumes less than 2.25 mW with 1.2 V power supply, and occupies 0.7 mm2 areas.
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