Chih-Hsuan Tai, Jyi-Tsong Lin, Y. Eng, Kuan-Yu Lu, Cheng-Hsin Chen, Yu-Che Chang, Yi-Hsuan Fan
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A numerical study of RF performance for a junctionless vertical MOSFET
In this paper, for the first time, we demonstrate the radio frequency (RF) performance of a junctionless vertical MOSFET (JLVMOS). According to the numerical simulation results, the JLVMOS can obtain higher gm, lower gd, in comparison to a junctionless planar SOI MOSFET. This because the vertical double-gate (DG) scheme truly helps to increase the gate controllability over the channel region, resulting in reduced short-channel effects (SCEs).