模拟拓扑布局中的确定性跳跃表

S. C. Maruvada, A. Berkman, K. Krishnamoorthy, F. Balasa
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引用次数: 9

摘要

提出了一种具有对称约束的器件级模拟放置算法。基于对布局的对称可行(S-F)二叉树表示(Balasa et al., 2004)的探索,这种新方法采用了1-3个确定性跳跃表(Munro et al., 1992)和(Papadakis, 1993),在模拟放置方面,其运行时间至少比以前(非切片)拓扑算法好20-30%,并且比基于绝对表示的更传统的方法明显更好(通常超过100%)
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Deterministic skip lists in analog topological placement
This paper presents a novel algorithm for device-level analog placement with symmetry constraints. Based on the exploration of symmetric-feasible (S-F) binary tree representations (Balasa et al., 2004) of the layout, the novel approach employs 1-3 deterministic skip lists (Munro et al., 1992) and (Papadakis, 1993), exhibiting running times at least 20-30% better than previous (nonslicing) topological algorithms for analog placement, and significantly better (typically, over 100%) than more traditional approaches based on the absolute representation
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