采用QPSK解调的方法对系统级ASIC进行自动化设计

Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372) Pub Date : 1998-09-13 DOI:10.1109/ASIC.1998.723017

Dae-Soon Kim, Hwak-Dong Park, Chan-Hyoung Kang

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引用次数: 0

摘要

介绍了一种完全符合DVB/DSS标准的QPSK数字解调器的设计方法和基本特点。ASIC设计和开发过程采用“自动化系统级设计方案”作为一种新的系统ASIC设计方法。本文讨论了非同步采样QPSK解调算法作为一种说明性算法，以演示使用系统级设计方案开发这种算法的好处。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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QPSK demodulator using the methodology of automated system-level ASIC design

The design methodology and the basic features of a QPSK digital demodulator fully compliant with the DVB/DSS Recommendations are presented. The ASIC design and development process employs an "automated system-level design scheme" as a new system ASIC design methodology. This paper discusses the nonsynchronized sampling QPSK demodulation algorithm as an illustrative algorithm in order to demonstrate the benefits when developing such an algorithm using a system-level design scheme.

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Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372)

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