一种用于高性能自动增益控制电路的数字部分内置自检结构

Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078) Pub Date : 1999-01-01 DOI:10.1145/307418.307496

A. Lechner, J. Ferguson, A. Richardson, B. Hermes

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引用次数: 6

摘要

现在人们普遍认为，可测试性设计和内置自检技术将是强制性的，以满足下一代混合信号集成系统的测试和质量规范。本文介绍了一种新的数字片上后处理功能，能够将高性能自动增益控制电路的生产测试时间减少70%。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A digital partial built-in self-test structure for a high performance automatic gain control circuit

it is now widely recognised that design-for-testability and built-in self-test techniques will be mandatory to meet test and quality specifications in next generation mixed signal integrated systems. This paper describes a new digital on-chip post processing function capable of reducing production test time for a high performance automatic gain control circuit by 70%.

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来源期刊

Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078)

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