{"title":"温度效应表征的Mosfet亚微米模型","authors":"H. Masuda, R. Ikematsu, J. Mano, H. Sugihara","doi":"10.1109/NUPAD.1990.748282","DOIUrl":null,"url":null,"abstract":"This paper presents a new circuit model for sub-um NMOSFETs and describes experiments on them. The model is focused on the temperature effect on I-V and CV characteristics. The resulting I-V modeling error (RMS: Root Mean Square) is verified to be less than 1.5% for Vd=O-SV and Vg=O-SV operating conditions, and 300-450K temperature range. The CV model error also examined, showing 6.0% at 400K. Drain current characteristics were measured with a 0.8um NMOS under various temperature conditions. Through experiments and parameter extraction (for MOSTSM model[ 1][2]) on the measured I-V data, the following results are noted (see Fig. 1). (1) Channel conductance of a unit area (Po) exhibits a significant decrease (one half) for the temperature rise from 300K to 450K. However, the corresponding drain current reduction is only 20% at Vds=Vgs=SV. (2) The above effect is caused by a change in the gate-field effect factor of channelconductance (eel ), which shows a monotonic decrease for rising temperature [4]. MOST temperature model","PeriodicalId":348970,"journal":{"name":"Workshop on Numerical Modeling of Processes and Devices for Integrated Circuits","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-06-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Mosfet Submicron Model For Temperature Effect Characterization\",\"authors\":\"H. Masuda, R. Ikematsu, J. Mano, H. Sugihara\",\"doi\":\"10.1109/NUPAD.1990.748282\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a new circuit model for sub-um NMOSFETs and describes experiments on them. The model is focused on the temperature effect on I-V and CV characteristics. The resulting I-V modeling error (RMS: Root Mean Square) is verified to be less than 1.5% for Vd=O-SV and Vg=O-SV operating conditions, and 300-450K temperature range. The CV model error also examined, showing 6.0% at 400K. Drain current characteristics were measured with a 0.8um NMOS under various temperature conditions. Through experiments and parameter extraction (for MOSTSM model[ 1][2]) on the measured I-V data, the following results are noted (see Fig. 1). (1) Channel conductance of a unit area (Po) exhibits a significant decrease (one half) for the temperature rise from 300K to 450K. However, the corresponding drain current reduction is only 20% at Vds=Vgs=SV. (2) The above effect is caused by a change in the gate-field effect factor of channelconductance (eel ), which shows a monotonic decrease for rising temperature [4]. MOST temperature model\",\"PeriodicalId\":348970,\"journal\":{\"name\":\"Workshop on Numerical Modeling of Processes and Devices for Integrated Circuits\",\"volume\":\"24 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-06-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Workshop on Numerical Modeling of Processes and Devices for Integrated Circuits\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NUPAD.1990.748282\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Workshop on Numerical Modeling of Processes and Devices for Integrated Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NUPAD.1990.748282","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Mosfet Submicron Model For Temperature Effect Characterization
This paper presents a new circuit model for sub-um NMOSFETs and describes experiments on them. The model is focused on the temperature effect on I-V and CV characteristics. The resulting I-V modeling error (RMS: Root Mean Square) is verified to be less than 1.5% for Vd=O-SV and Vg=O-SV operating conditions, and 300-450K temperature range. The CV model error also examined, showing 6.0% at 400K. Drain current characteristics were measured with a 0.8um NMOS under various temperature conditions. Through experiments and parameter extraction (for MOSTSM model[ 1][2]) on the measured I-V data, the following results are noted (see Fig. 1). (1) Channel conductance of a unit area (Po) exhibits a significant decrease (one half) for the temperature rise from 300K to 450K. However, the corresponding drain current reduction is only 20% at Vds=Vgs=SV. (2) The above effect is caused by a change in the gate-field effect factor of channelconductance (eel ), which shows a monotonic decrease for rising temperature [4]. MOST temperature model