{"title":"在ATPG使用交叉检查技术的实际考虑","authors":"S. Chandra, N. Jacobson, G. Srinath","doi":"10.1109/ATS.1992.224441","DOIUrl":null,"url":null,"abstract":"The authors deal with some of the practical considerations that arise in porting ATPG patterns to the tester. Issues such as races, bidirectional pins, three-state buses and asynchronous circuits are discussed. Algorithm for dealing with these constructs during the test pattern generation phase are presented. Patterns that correctly handle such situations are easily ported to the tester. Experimental results on real circuits are presented. The results also include ATE resources such as tester time and memory required for the test program. The circuits are assumed to adhere to the CrossCheck design-for-testability methodology.<<ETX>>","PeriodicalId":208029,"journal":{"name":"Proceedings First Asian Test Symposium (ATS `92)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-11-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Practical considerations in ATPG using CrossCheck technology\",\"authors\":\"S. Chandra, N. Jacobson, G. Srinath\",\"doi\":\"10.1109/ATS.1992.224441\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The authors deal with some of the practical considerations that arise in porting ATPG patterns to the tester. Issues such as races, bidirectional pins, three-state buses and asynchronous circuits are discussed. Algorithm for dealing with these constructs during the test pattern generation phase are presented. Patterns that correctly handle such situations are easily ported to the tester. Experimental results on real circuits are presented. The results also include ATE resources such as tester time and memory required for the test program. The circuits are assumed to adhere to the CrossCheck design-for-testability methodology.<<ETX>>\",\"PeriodicalId\":208029,\"journal\":{\"name\":\"Proceedings First Asian Test Symposium (ATS `92)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-11-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings First Asian Test Symposium (ATS `92)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ATS.1992.224441\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings First Asian Test Symposium (ATS `92)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATS.1992.224441","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Practical considerations in ATPG using CrossCheck technology
The authors deal with some of the practical considerations that arise in porting ATPG patterns to the tester. Issues such as races, bidirectional pins, three-state buses and asynchronous circuits are discussed. Algorithm for dealing with these constructs during the test pattern generation phase are presented. Patterns that correctly handle such situations are easily ported to the tester. Experimental results on real circuits are presented. The results also include ATE resources such as tester time and memory required for the test program. The circuits are assumed to adhere to the CrossCheck design-for-testability methodology.<>
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